Digital Microelectronics Engineering Verification and Validation; DOT&E During the Design Phase to Absolutely Positively be on Cost on Schedule/Final Wrap; The "So What"

Description: 

This final webinar in the series introduces the fundamentals of the verification engines for pre-silicon verification and early software development. We will discuss formal verification, simulation at the transaction- and signal-level, emulation, and FPGA-based prototyping. Each of the engines provides different performance, fidelity, and debug flexibility that needs to be considered carefully in design bring-up and engine cost. Using practical customer examples, we will discuss options that development teams have to balance the engine usage and discuss the resulting optimization of verification throughput, "shift-left" software development at the earliest possible time during a project. Review of the four sessions the training and review the potential impact of commercial best practices on optimized development flows, delivering in-budget and on-time results.